Nvidia is hiring a
ASIC Design Engineer

NVIDIA is hiring a ASIC Design Engineer to design, analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion and desire to deliver innovative products. Together, we will build the next generation of life changing SoC's. If you are a motivated individual that understands how SoC systems are architected and built and understands various development cycles, this is your place to be

What you'll be doing:

• As a key member of the design team, you will discuss, document, integrate, implement, and deliver fully verified, PPA-efficient IP to SOC

• Hands on system architecture for the IP solution in SOC.

• Work with the SOCD team to make the IP connected and bring up function

• Partnering with the verification team to define the verification plan and make the IPs fully signoff at IP and SOC levels.

• Work with SOCV/EMU/SW to bring up function at the system level under real scenarios.

• Partnering with the power and backend team to meet PPA, timing, and other physical requirements

• Join the new hire interview and help with newcomer training

What We Need To See:

• Track record of first-pass success in ASIC Development

• B.S. or M.S. degree in Computer Engineering or Electrical Engineering

• 2+ years of relevant work experience in RTL development focused on CPU, GPU, and high-performance architectures.

• Proficiency in industry-standard RTL development and synthesis tools.

• Ability to evaluate microarchitectural options for tradeoffs across design, verification, and PD

• Experience with test bench environments for unit and system-level verification.

• Proficient in functional coverage and assertion-based verification methodologies

• Good debugging and analytical skills

• Strong interpersonal skills and ability to work with on-site and remote teams

Ways to stand out from the crowd:

• Proficient programming in Perl/Python (or similar scripting languages).

• Good English communication skills

• Hands-on experience with AMBA protocols such as AXI, ACE, CHI, ATB, etc.

• Hands-on experience with complex subsystems in new technologies like ARM CPU complex, LPDDR, HBM, GPU’s, DLA, PCIE or Network on chip