Posted Aug 2

Nvidia is hiring a
Senior ASIC Design Engineer - Memory Subsystem

US, CA, Santa Clara • US, MA, Westford • US, TX, Austin • 2 Locations • US, CA, Santa Clara
Full time

We are looking for a Senior ASIC Design Engineer for Memory Subsystem Team!

As a Senior Designer at NVIDIA, you'll join a group of hard-working engineers to design and implement innovative coherent fabrics for our Tegra SoCs. In this position, you'll make a real impact in a dynamic, technology-focused company. Your work will impact product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We've crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the computing platforms of tomorrow.

What you'll be doing:

  • As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers and deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because of the complex area, latency, power, bandwidth and quality-of-service requirements.

  • In this position, you will have the opportunity to be responsible for the micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using innovative CAD tools and using the latest process technologies.

What we need to see:

  • BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus.

  • 5+ years of relevant industry experience and a background in high-speed coherent interconnects, protocol bridges, hardware-managed coherency and system level caches.

  • Experience with multiple clock domains and asynchronous interfaces

  • Knowledge of industry specifications like CHI/AXI/CXL/UCIE/PCI-E is a plus.

  • Background with ARM coherent fabrics (e.g. CMN) is a plus.

  • Knowledge of DRAM controllers is a plus.

  • Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development.

  • Strong working knowledge of Verilog or VHDL.

  • Familiarity with board and system level issues.

  • Programming skills in C and/or PERL.

  • Excellent communication skills and interpersonal skills are required. A history of mentoring junior engineers and interns is a huge plus.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Memory Subsystem Design Team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.

The base salary range is $156,000 - $287,500. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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